Last Date for Registration: Sep. 18th, 2017

Eligibility: Faculty/PhD/Research Scholars of engineering/technical institutions and persons from Govt. departments/labs and industry.

Experts from Academia/Industry: Ankur Sangal (CoreEL Technologies, New Delhi), Dr. B.P. Das (IITR)

Objective of the Course

  • Create and understand HDL Design using FPGA.
  • Implement sequential and combinational design using Xilinx Vivado Tool.
  • Xilinx Design Constraints.
  • Debugging using Vivado Logic Analyzer cores.
  • Simple Hardware Design.
  • Adding Peripherals in Programmable Logic.
  • Project implementation like UART & Traffic Light Controller.
  • Benefits and Outcomes of the Course

  • Create and debug HDL designs.
  • Configure FPGA architecture features, such as Clock Manager, using the Architecture Wizard.
  • Pinpoint design bottlenecks using the reports.
  • Utilize synthesis options to improve performance.
  • At the end of the program, participants will be able to:

  • Upgrade the lab facilities in the parent institutes in areas of FPGA based design, image processing, wireless communications etc.
  • Guide/Mentor the students to seek opportunities in application specific integrated circuits (ASIC), Electronics design automation(EDA), speech recognition, test & measurements etc.

  • Course Program

  • The program is split into lectures and labs sessions.
  • Hands-on experience on basic & advanced-level topics.
  • Interaction & learning with experts from academia & industry.
  • Certificates to the participants by E&ICT Academy IITR.

  • Course Content:
  • Vivado Design Flow.
  • Xilinx Vivado Tool Flow with FPGA based coding technique.
  • Xilinx Design Constraints.
  • Timing constraints and perform the timing analysis.
  • Vivado Logic Analyzer cores to debug/analyze system behavior.
  • IP Integrator to develop a basic embedded system for a target board.
  • Extend the hardware system by adding AXI peripherals from the IP catalog.
  • IP Integrator and Embedded system design flow.
  • Important Details

    Last Date for Registration:
    Sep. 18th, 2017
    40 seats on first-cum-first-serve basis
    2 days, 15 hours
    Available if required in the institute.
    Registration Fee
    Faculty Members: Rs. 1,000/-
    Research scholars: Rs. 500/-
    Persons from Industry: Rs. 3,000/-
    Payment Details
    Demand draft drawn in favor of "Dean SRIC IIT Roorkee" payable at Roorkee
    How to Apply
    You can apply online by click here to fill-up the application form OR you can download offline form and email scanned copy to
    Contact Details
    Dr. Pramod Kumar (Director, Tula's Institute)
    Dr. B.P. Das (Assistant Professor, ECE Dept, IITR)
    Dr. Sanjeev Manhas (P.I., E&ICT Academy, ECE Dept, IITR)
    Tel: +91-1332-286457, +91-7078627392

    A hard copy of the application form along with Demand Draft must reach to the following address: Mr. Prateek Sharma, EICT Academy, ECE Department, IIT Roorkee, Uttarakhand 247667.

    Follow on: Facebook, LinkdIn

    Visitor Number